Colin Kakama.

Open notebook: An experimentally accessible approach to Nanomechanical rod logic circuits

Table of contents

  1. Intro to the basics of logic
  2. Rod logic references
  3. Example schematic of a 3d logic gate
  4. Friction minimising strategies
  5. Heat recycling strategies
  6. Metrics to beat/demonstrate to be on par with traditional computers
  7. Steps forward

Intro to the basics of logic

Rod logic references:

Example schematic of a 3d logic gate:

Screenshot 2026-06-29 at 11

Schematic diagram of a single displacement cycle asynchronous-input nanomechanical OR gate (Drexler)

Friction minimising strategies

Heat recycling strategies

Metrics to beat/demonstrate to be on par with traditional computers

Metric TSMC "3nm" Nanoparticle rod logic Molecular rod logic
Logic gate size dimension 50nm
Energy per Switching Operation
Energy(J) at 1MHz operation speeds 1,406 zJ 0.051 zJ
Energy(J) at 1GHz operation speeds ~1,700 zJ 0.135 zJ
Energy(J) at 6GHz operation speeds >10,000 zJ ? possible ? possible

Metrics to beat/demonstrate to be on par with traditional computers

Steps forward

  1. Theoretical:
    1. Materials exploration
    2. Surface forces startegies mapping
  2. Experimental
    1. Demo logic gate to beat/match TSMC “3nm” on either one of the following:
      1. size
      2. energy per switching operation
    2. Demo of larger logic circuits (composite gates, half adder, full adder, ALU, CPU, etc..)
  3. Scale
  4. Push till the mechanosynthetic limit.